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What voltage would you have to have at the output of the folded cascode to have 0 VDC at the output?

between 0.2 to 0.5Vdc depending of output current.



Why 1? because the voltage gain is from the junction base/collector. I thought because you put me in doubt.

What determines the gain? RE, R'e, RC and beta [/quote]

thank's Maxpou

Hi,
thank you for your suggestions but my first goal is to have no coupling cap and without global NFB circuit but it's very appreciated. I have another alternative because my circuit is dead and if it's hard for this one I will try yours. I'm nor sure to understand your last suggestion with lsk389 as DC coupling follower and 100nF cap? Thank you! Maxpou

How are you going to keep that point at the precise voltage somewhere between 0.2 and 0.5 volts that will give 0 VDC at the output?



You still don't understand how your circuit works (or fails to work).

I think we can agree that when the input signals change that the current in Q2 will also change, yes?

The current at the top of Q2 goes two separate places -- through R2 and Q4, yes?

So let us start with the first question that you must answer to understand how your circuit works (or fails to work). What determines how much current goes through R2 and how much current goes through Q4?

How are you going to keep that point at the precise voltage somewhere between 0.2 and 0.5 volts that will give 0 VDC at the output?

I don't know maybe a dc servo.

You still don't understand how your circuit works (or fails to work).

I think we can agree that when the input signals change that the current in Q2 will also change, yes?

The current at the top of Q2 goes two separate places -- through R2 and Q4, yes?

So let us start with the first question that you must answer to understand how your circuit works (or fails to work). What determines how much current goes through R2 and how much current goes through Q4?[/quote]

Q5 and Q7

Maxpou

Maxpou,

I don't mean to insult you, but I think a good idea would be to spend some time with "The Art of Electronics" by Horowitz and Hill, Second Edition. Or it may be easier to find a text by Tietze and Schenk from Germany. It is also available in English, but I don't know about French. The second edition is twice the size of the first edition, but focuses on other issues than the basics, so either version will do.

Let me give you a good idea of what I mean. Q4 is outputting some current. You don't know how much because you still haven't figured out how the signal current from Q2 splits between R2 and Q4. But we can assume that there is some signal current that makes it through Q4. Now it has to go somewhere. The only choices are Q3 and Q7.

a) What do you think the input impedance of Q3 is? Explain your reasoning.

b) What do you think the input impedance of the collector of Q7 is? Explain your reasoning.

Hi Max,



I find this irrational fear of coupling capacitors amusing, especially when the design techniques used to avoid the coupling cap are often worse than the effect from coupling cap, if a high quality capacitor is used.



I think I am suggesting "without global feedback.



You can use a dual J-Fet and three resistors plus a dual rail supply to make a buffer that has a very high input impedance and equal input and output DC voltage. This is basically a DC Coupled Pass B1. Coverage of this circuit is found in Erno Borbeley's 2 part J-Fet article from Audio Express.

This way a very low value coupling capacitor can be used because of the very high input impedance, so even the most exotic cap constructions remain somewhat affordable.

If using a trick circuit to bootstrap the input gate resistor the input impedance can easily be boosted into the regions of 100's MOhm so even some of these rare but available surplus japanese copperfoil & polystyrene capacitors that are available for a few bucks tops for a few nF (which suffice), tinfoil & teflon is also possible...

In addition the circuit is really "tres primitive", so you can be pretty sure it will work at the first try. You can then always experiment with more complex circuits later...

Ciao T

_________________
Theory is when you know everything but nothing works.
Practice is when everything works but you don't know why.
Guruhood is when you know everything and everything works accordingly.

Hi,



Bingo. A DC servo. Which is an amplified capacitor, amplified by an Op-Amp. Added to a nonlinear folded cascode...

So clearly, "coupling cap bad" but "DC Servo Cap, DC-Servo Op-Amp and ton's of feedback and extra active circuitry = GOOD"...

Or not.

I would also suggest that you still do not get how folded cascodes work.

I honestly think you are better off with my suggestion, instead of what you are proposing and fail to understand.

Start simple. Get results.

Ciao T

_________________
Theory is when you know everything but nothing works.
Practice is when everything works but you don't know why.
Guruhood is when you know everything and everything works accordingly.

Hi Charles,
sorry but last week I was very busy.



That's OK Charles but is not easy for me to understand everything because English is not my first language and i'm not a engineer so I can not do all the calculations for the circuit but often I will test it on breadboard.




a) What do you think the input impedance of Q3 is? Very high Z because the jfet are not a current biased but voltage biased
b) What do you think the input impedance of the collector of Q7 is? Very high because it is not in reverse biased but I'm not sure

Charles let me know if i'm correct. Thank you! Maxpou

Maybe you like to build this:
http://www.raylectronics.nl/index_en.html
(Discrete CD output stage)
though I like more this:
http://home.kabelfoon.nl/~dezaire/CD80m ... zetter.htm

Use Google to translate double Dutch

Yes, Maxpou, you are correct. I know that English is not your first language and that is why I suggested Tietze and Schenk. I was hoping that it has been translated into other languages. In many ways it is better than Horowitz and Hill. Actually it is best to have them both...

As far as the input impedance of Q3, yes it is very high. I would state the reason differently however. I would say that it is because the G-S junction is a reverse-biased diode. This is a very helpful way to look at it. It then become obvious why the input impedance is so high. It also warns you what happens if the input signal exceeds +/- 0.6 Vpeak (think about it).

The input impedance of the collector of Q7 is also high. There are many ways to understand this. One way is to look at the slope of the characteristic curves. Look at the basically (but not quite) horizontal lines. If you look at the change in Vce divided by the change in Ic, the unit will be reciprocal ohms. This is referred to as the output conductance of the part and is the reciprocal of the output resistance. The flatter the curves, the higher the output impedance. Most BJTs have an output impedance (at the collector) on the order of a few hundred kohms.

So if the current is coming out of Q4 then it will be hard to go into either Q3 or Q7. By Ohm's law E = IR, so what will the voltage be at the junction of Q3, Q4, and Q7?

HI Charles,
thank you for reply, it's very appreciated.



I have Horowitz and Hill second edition, but I will order the other book as soon as possible. Thank you for your suggestions



I have a problem if I want 2Vrms at output.



Thank you again for your explaination.



I'm not sure but, if I set my current sink (Q7) at 4mA for 2Vrms I add a resistor to ground of 1.4K to the junction of Q4, Q3 and Q7.

Maxpou

Thank you Elso for your links I will look later. Maxpou

Hey Charles,
can tell me anything! Maxpou

Hi Guys,
I built finally a simple IV stage with coupling cap and tested with PCM1798. I have a problem, I don't have a beautiful sine wave at output, I reduced the bandwidth with a cap 15nF at input and the sine wave is better. But I would like to know if I can burn my DAC with higher cap because I would like to reduce the bandwidth at 80Khz and where is the best place to put a filter at input or output? Thank you! Maxpou

A direct answer to your question is: filter before applying gain. For a first order corner at 80kHz you will need 91nF, a bit too severe for the DAC outputs (IMO).

But you still need to solve some bigger issues, related to the lack of a good virtual ground and the -3.5mA that the DAC needs to put out around BPZ.