"This means the clock is VERY fast, leaving very little time to introduce jitter and noise............"
Very Fast as in very fast rise times and fall times.
Why? Finite rise times introduce "decision moment" inaccuracies. In your DAC, ADC, SRC. Decision inaccuracies are timing errors, is jitter.
Inform yourself: it's all over the internet.
Here are some examples, read them but don't stop there.http://www.tek.com/Measurement/scopes/j ... 6146_1.pdfhttp://www.lavryengineering.com/white_papers/jitter.pdf
>30 years RF design experience? yeah sure. All sinewave experience.
We're talking square wave stuff here: <2ns rise times, no ringing, no overshoot, ground bounce, power supply feedback, EMC, etc etc. Quite another league. Communications engineers league. Guys 'n gals who have to pass 100's of MB/s across a two wire system. They know the drill.
Jocko, stop bashing and start being intelligent.
You're your own worst enemy. No wonder you were banned from other fora.
Why not somebody try a host of devices like this in a decent cdplayer and report what he's experiencing?
Now THAT would be an informed post.
And a better pastime activity than rearing your ugly head on the internet, and making no friends.