Currently there is no way to directly bypass the OS filter and pump 4x or 8x data into the ASRC section. A "hack" would be to use whats called "slow rolloff" mode which doesn't have the stopband attenuation of the sharp rolloff, but its has muxh muxh less inband ripple. You could then use your own blend of OS filter from a DSP or FPGA and fire the data to the data at a rate of up to about 350kHz. (It may go faster on most chips, but the slowests ones should be able to do this rate)
LOL, you design *and test* this thing for 350 KHz ? Even the oversampler ?
Since this part actually uses enough bits of precision in the oversampler (unlike some others) I would venture to guess that filter-bypass wouldn't be that important... also apparently Dustin took care of the digital noise coming from the DSP inside the chip, which would be another reason to use filter bypass... if you can make a better filter than the one in the Sabre (for instance using more taps) in a FPGA, and your filter outputs 176.4k or 192k, the filter that comes after that matters much less as long as it doesn't introduce rounding errors...
dusfor99 wrote:
About the ASRC, your right, it only needs the sample before, the sample after and the phase error of the clocks to know how to correct for the ASYNC rates.