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PostPosted: Sun May 04, 2014 5:30 am 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
http://sourceforge.net/p/equalizerapo/

Incredibly nice parametric eq for windoze! System wide: it is installed inside the windows audio stack. You just edit the txt file to change filter settings in REAL TIME! I´m here playing with the filters, it´s so nice... just hit "save" on notepad and you hear the change. Like this:

Code:
Preamp: -6 dB
Filter  1: ON  PK  Fc  80,0 Hz  Gain  4,0 dB  Q 0,7
Filter  2: ON  NO  Fc  125 Hz  Q 2,00
Filter  3: ON  HS 12dB  Fc 12000 Hz  Gain 2.0 dB

In the example above, Filter 1 is a standard parametric, self explanatory
Filter 2 is a NOtch filter for a strong resonance that I have here. WOW, very effective and did not ruin the bass!
Filter 3 is a HighShelf with a slope of 12dB/oct. Unfortunately the high shelf has no continuous Q adjustment, it´s either a slope of 12dB (Q=0.707?) or 6dB (Q=0.5?)

I love it! Finally I can surf youtube with similar eq settings I use in JRiver.

Have fun!


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PostPosted: Mon May 05, 2014 3:52 pm 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
This EQ is top notch! Definitely better than JRiver's. I have never achieved such a good sound before. I bet it is FIR, linear phase, excellent precision (64 bits).

My modest Tannoy MX2-M has risen to another level with these eq settings, and the bass reflex port blocked. I am amazed at some eletronic music and bass synthetizers sounding homogeneous down to the low notes, with airy highs and so crisp snares. Very good playlist btw: https://www.youtube.com/watch?v=0lWPfJZ ... 5BBooNna01


Code:
Preamp: -3 dB

Filter  1: OFF   None   

Filter  2: ON   PK      Fc 60 Hz    Gain 9.0 dB   Q 0,70

Filter  3: ON   NO      Fc 126,5 Hz               Q 2,00

Filter  4: ON   PK      Fc 230 Hz   Gain 1,5 dB   Q 0,70

Filter  5: ON   PK      Fc 700 Hz   Gain -1,5 dB   Q 0,70

Filter  6: ON   PK      Fc 3600 Hz   Gain -3,0 dB   Q 0,70

Filter  7: ON   HS 6dB          Fc 8000 Hz   Gain 3,0 dB


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PostPosted: Thu May 08, 2014 6:00 am 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
Here is some comment from the coder of this *excellent* EQ.

http://www.hometheatershack.com/forums/ ... post598938

(The filter implementation is IIR - Infinite Impulse Response)

I am now learning vhdl and looking forward to implement a two way crossover into a Spartan IIE 300K. Old I know, but it's what I have. It is only supported by the old Xilinx ISE 10.1 (updated to SP3). Maybe a dsp board would be more adequate for this task but I don´t have that.

The board has some static ram as a peripheral, I might have enough memory and computational power to implement the delay for the tweeter channels - time alignment.

The onboard clock is 50MHz. From what I have learned so far this is not a problem and I can use independent frequencies for input/output data and internal clocking in the fpga.

The crossover doesn´t need programmable coefficients. Can be hard coded. I am keeping the goals simple for a start. I believe the easy route is a tool like Xilinx FIR Compiler. Or maybe simulink (matlab) can translate it to HDL. Need a jump start at this, I appreciate if anyone can point me to some good online material.


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PostPosted: Thu May 08, 2014 6:13 am 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
Watching this now:
FPGA - Lecture #5 -- lab 2 audio filtering
https://www.youtube.com/watch?v=DQVRNg713nk


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PostPosted: Thu May 08, 2014 8:59 pm 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
Found some good material. Here it is:
http://users.etech.haw-hamburg.de/users ... IE8/Notes/

From the introduction:
3.1 Learning Outcome
The aim of this course covers the understanding and the ability to apply a complete design flow for FPGA implementation of digital filters with fixed point arithmetic. The knowledge of FIR and IIR filter design steps for selected filter types will be provided with Matlab functions and the funda-mental mathematical background. Especially the finite word length effects which are introduced by fixed point hardware should be understood and further be regarded as conditions with each step of design flow and final hardware implementation.


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PostPosted: Fri May 09, 2014 8:44 pm 
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Goat

Joined: Mon Nov 28, 2005 1:10 pm
Posts: 547
Clocking of the fpga should not be a problem. No need to use the on-board clock at all. Any of the geneneral purpose I/O (on the Spartan IIE) can serve as a clock input to the DLL (delay locked loop) which can provide multiplication by two or division down to 1/16.

The best option would be to use a dedicated clock input pin. However, the designers of this development board (stratford digital "sputnik") chose to connect all those pins to ground. With the exception of one which receives the on-board 50MHz clock.

alexandre wrote:
The onboard clock is 50MHz. From what I have learned so far this is not a problem and I can use independent frequencies for input/output data and internal clocking in the fpga.


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